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NOIL1SN3000A
Table 7. AC ELECTRICAL CHARACTERISTICS (Note 1)
The following specifications apply for VDD = 2.5 V
Symbol
F CLK
fps
Parameter
Input clock frequency
Frame rate
Condition
fps = 485
Maximum clock speed
Typ
Max
206
485
Units
MHz
fps
1. All parameters are characterized for DC conditions after thermal equilibrium is established.
Combining Power Supplies
Every module in the image sensor has its own power
supply and ground. The grounds can be combined
externally, but not all power supply inputs may be combined.
Some power supplies must be isolated to reduce electrical
crosstalk and improve shielding, dynamic range, and output
swing. Internal to the image sensor, the ground lines of each
module are kept separate to improve shielding and electrical
crosstalk between them.
The LUPA3000 contains circuitry to protect the inputs
against damage due to high static voltages or electric fields.
However, take normal precautions to avoid voltages higher
than the maximum rated voltages in this high-impedance
circuit. All power supply pins should be decoupled to
ground with a 100 nF capacitor. The Vpix and Vres_ds
power are the most sensitive to power supply noise.
The recommended combinations of supplies are:
? Analog group of +2.5 V supply: V RES_DS , V ADC , V pix ,
V ANA
? Digital Group of +2.5 V supply: V DD , V D_HS , V LVDS
? The V MEM_L and V PRECHARGE supplies should have
sinking and sourcing capability
Table 8. BIASING RESISTORS
Biasing
The sensor requires three biasing resistors. Refer to
Table 8 for more information.
For low frame rates (< 2000 fps), the
PRECHARGE_BIAS_1 pins are connected directly with
the VPRECHARGE pins. The DC level on the
PRECHARGE_BIAS_1 pins acts as a power supply and
must be decoupled.
For higher frame rates, the duty cycle on VPRECHARGE
is too high and the voltage drops. This causes the black level
to shift compared to the low frame rate case. In higher frame
rates, the voltage on PRECHARGE_BIAS_1 is buffered on
the PCB and the buffered voltage is taken for
VPRECHARGE. A second possibility is to make the biasing
resistor larger until the correct DC level is reached.
PRECHARGE_BIAS_2 must be left floating, because it
is intended for testing purposes.
Signal
Current_Ref_1
Current_Ref_2
Precharge_Bias_1
Precharge_Bias_2
Comment
Connect with 20 k W (1% prec.) to V AA . Decouple to GND AA
Connect with 50 k W (1% prec.) to GND ADC . No decoupling
Connect with 90 k W (1% prec.) to V PIX . Decouple to Vpix with
100 nF.
Leave floating
Related Module
Column amplifiers
ADCs
Pixel array
DC level
769 mV at 86 m A
25 m A to gnd
0.45 V at 23 m A
http://onsemi.com
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